The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2016
Filed:
Dec. 22, 2011
Siddharth Jain, Santa Barbara, CA (US);
John Bowers, Santa Barbara, CA (US);
Matthew Sysak, Sunnyvale, CA (US);
John Heck, Berkeley, CA (US);
Ran Feldesh, Gan Yavne, IL;
Richard Jones, San Mateo, CA (US);
Yoel Shetrit, Kfar Ben-Nun, IL;
Michael Geva, Sierra Madre, CA (US);
Siddharth Jain, Santa Barbara, CA (US);
John Bowers, Santa Barbara, CA (US);
Matthew Sysak, Sunnyvale, CA (US);
John Heck, Berkeley, CA (US);
Ran Feldesh, Gan Yavne, IL;
Richard Jones, San Mateo, CA (US);
Yoel Shetrit, Kfar Ben-Nun, IL;
Michael Geva, Sierra Madre, CA (US);
INTEL CORPORATION, Santa Clara, CA (US);
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Oakland, CA (US);
Abstract
A semiconductor metallurgy includes a ratio of germanium and palladium that provides low contact resistance to both n-type material and p-type material. The metallurgy allows for a contact that does not include gold and is compatible with mass-production CMOS techniques. The ratio of germanium and palladium can be achieved by stacking layers of the materials and annealing the stack, or simultaneously depositing the germanium and palladium on the material where the contact is to be manufactured.