The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2016

Filed:

Nov. 14, 2012
Applicant:

Soitec, Bernin, FR;

Inventors:

Richard Ferrant, Esquibien, FR;

Joerg Vollrath, Olching, DE;

Roland Thewes, Kleinmachnow, DE;

Wolfgang Hoenlein, Unterhaching, DE;

Hofmann Franz, Munich, DE;

Gerhard Enders, Olching, DE;

Assignee:

Soitec, , FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/02 (2006.01); G11C 7/06 (2006.01); G11C 7/08 (2006.01); G11C 7/12 (2006.01); G11C 11/4091 (2006.01); G11C 11/4094 (2006.01);
U.S. Cl.
CPC ...
G11C 7/06 (2013.01); G11C 7/065 (2013.01); G11C 7/08 (2013.01); G11C 7/12 (2013.01); G11C 11/4091 (2013.01); G11C 11/4094 (2013.01); G11C 2207/002 (2013.01);
Abstract

The invention relates to a sense amplifier for sensing and amplifying data stored in a memory cell, the sense amplifier being connected between a bit line (BL) and a reference bit line complementary (/BL) to the first bit line and comprising: a sense circuit (SC) capable of providing an output indicative of the data stored in the memory cell; and a precharge and decode circuit (PDC) comprising a pair of dual gate transistors (T, T) for precharging the first and second bit lines during a precharge operation and for transferring the output provided by the sense circuit to a data line (LIO,/LIO) during a read operation.


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