The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2016

Filed:

Feb. 20, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Emre Alptekin, Fishkill, NY (US);

Pooja R. Batra, White Plains, NY (US);

Kangguo Cheng, Schenectady, NY (US);

Ramachandra Divakaruni, Ossining, NY (US);

Johnathan E. Faltermeier, Delanson, NY (US);

Reinaldo A. Vega, Mahopac, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/119 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10829 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 27/10826 (2013.01); H01L 27/10867 (2013.01); H01L 27/10879 (2013.01);
Abstract

Embodiments for the present invention provide a semiconductor device and methods for fabrication. In an embodiment of the present invention, a semiconductor structure comprises a first conductor horizontally formed on a semiconductor substrate. A second conductor is vertically formed in a semiconductor stack that includes the semiconductor substrate. An oxidized region is formed proximate to the first conductor. The second conductor is formed in a manner to be in electrical communication with the first conductor. The first conductor is formed in a manner to be laterally connected to the second conductor. The first conductor is formed in a manner to not traverse beneath the oxidized region. The first conductor is formed in a manner to have a reduced link-up resistance with adjacent epitaxial material included in the semiconductor structure.


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