The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2016
Filed:
Aug. 30, 2012
Joji Philip, San Jose, CA (US);
Sailesh Kumar, San Jose, CA (US);
Eric Norige, E. Lansing, MI (US);
Mahmud Hassan, San Carlos, CA (US);
Sundari Mitra, Saratoga, CA (US);
Joji Philip, San Jose, CA (US);
Sailesh Kumar, San Jose, CA (US);
Eric Norige, E. Lansing, MI (US);
Mahmud Hassan, San Carlos, CA (US);
Sundari Mitra, Saratoga, CA (US);
NetSpeed Systems, San Jose, CA (US);
Abstract
Systems and methods for automatically building a deadlock free inter-communication network in a multi-core system are described. The example embodiments described herein involve deadlock detection during the mapping of user specified communication pattern amongst blocks of the system. Detected deadlocks are then avoided by re-allocation of channel resources. An example embodiment of the deadlock avoidance scheme is presented on Network-on-chip interconnects for large scale multi-core system-on-chips.