The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2016
Filed:
May. 23, 2014
Applicant:
Kyocera Slc Technologies Corporation, Yasu-shi, Shiga, JP;
Inventor:
Hidetoshi Yugawa, Kyoto, JP;
Assignee:
KYOCERA CIRCUIT SOLUTIONS, INC., Kyoto, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 3/00 (2006.01); H05K 1/03 (2006.01); H05K 3/42 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H05K 1/115 (2013.01); H05K 3/0035 (2013.01); H05K 1/036 (2013.01); H05K 1/0373 (2013.01); H05K 3/421 (2013.01); H05K 3/4676 (2013.01); H05K 2201/0209 (2013.01); H05K 2201/0269 (2013.01); H05K 2201/068 (2013.01); H05K 2201/09854 (2013.01); H05K 2201/2054 (2013.01); H05K 2201/2072 (2013.01); H05K 2203/1476 (2013.01);
Abstract
A wiring boardincludes a lower wiring conductor, an upper insulating layerlaminated on the lower wiring conductorand having a via holewhere a bottom surface is the lower wiring conductor, and a via conductorconnected to the lower wiring conductorand filling the via hole; and the upper insulating layerincludes a first resin layerand a second resin layersequentially laminated on the lower wiring conductor, the via holehas an annular grooveover a whole circumference of the inner wall in a boundary between both resin layersand, and the via conductorfills the groove