The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2016
Filed:
Sep. 05, 2012
Mohamad Towfik Krounbi, San Jose, CA (US);
Dmytro Apalkov, San Jose, CA (US);
Vladimir Nikitin, Campbell, CA (US);
Alexander A. G. Driskill-smith, Redwood City, CA (US);
Mohamad Towfik Krounbi, San Jose, CA (US);
Dmytro Apalkov, San Jose, CA (US);
Vladimir Nikitin, Campbell, CA (US);
Alexander A. G. Driskill-Smith, Redwood City, CA (US);
SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-Do, KR;
Abstract
A magnetic device including memory cells is provided. Each memory cell can store multiple bits corresponding to multiple data storage layers. Desired spacing(s) and desired junction angle(s) for the data storage layers are determined in each memory cell. The desired junction angle(s) and the desired spacing(s) correspond to spin transfer switching currents for the data storage layers having. A magnetoresistive stack including plurality of layers for each of the memory cells is deposited. The memory cells include the data storage layers. A data storage layer layers is spaced apart from nearest data storage layer(s) by a distance corresponding to the desired spacing(s). A mask corresponding to the memory cells is provided on the layers. The memory cells are defined such that each memory cell has the desired junction angle(s) and the desired spacing(s) and such that the data storage layers for each of the memory cells is self-aligned.