The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

Jul. 15, 2014
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Jun Zhai, San Jose, CA (US);

Mengzhi Pang, Cupertino, CA (US);

Se Young Yang, San Jose, CA (US);

Leland W. Lew, Los Altos, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/60 (2006.01); H01L 23/538 (2006.01); H01L 23/485 (2006.01); H01L 23/552 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/3675 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 25/0652 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32245 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/1434 (2013.01);
Abstract

In some embodiments, a semiconductor device package assembly may include a first substrate. The first substrate may include a first set of electrical conductors which electrically connect the assembly. In some embodiments, the assembly may include at least one electrical conductor coupled to the first substrate such that at least one of the electrical conductors exposes through a perimeter surface of the semiconductor device package assembly. In some embodiments, the assembly may include a first die electrically connected to a second surface of the first substrate using a second set of electrical conductors. The assembly may include an electronic memory module coupled to the first die. In some embodiments, the assembly may include a shield applied to an upper surface of the assembly and electrically coupled to at least one of the exposed electrical conductors. The shield may inhibit, during use, electromagnetic interference.


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