The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 05, 2016
Filed:
Oct. 31, 2013
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Kuo-Yu Cheng, Tainan, TW;
Keng-Yu Chen, Tainan, TW;
Wei-Kung Tsai, Tainan, TW;
Kuan-Chi Tsai, Kaohsiung, TW;
Tsung-Yu Yang, Zhubei, TW;
Chung-Long Chang, Dou-Liu, TW;
Chun-Hung Chen, Xinpu Township, Hsinchu County, TW;
Chih-Ping Chao, Hsinchu County, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsin-Chu, TW;
Abstract
Embodiments of mechanisms of forming a radio frequency area of an integrated circuit are provided. The radio frequency area of an integrated circuit structure includes a substrate, a buried oxide layer formed over the substrate, and an interface layer formed between the substrate and the buried oxide layer. The radio frequency area of an integrated circuit structure also includes a silicon layer formed over the buried oxide layer and an interlayer dielectric layer formed in a deep trench. The radio frequency area of an integrated circuit structure further includes the interlayer dielectric layer extending through the silicon layer, the buried oxide layer and the interface layer. The radio frequency area of an integrated circuit structure includes an implant region formed below the interlayer dielectric layer in the deep trench and a polysilicon layer formed below the implant region.