The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2016

Filed:

Sep. 24, 2013
Applicant:

Sandisk Technologies Inc., Plano, TX (US);

Inventors:

Uday Chandrasekhar, San Jose, CA (US);

Jianmin Huang, San Carlos, CA (US);

Steven Sprouse, San Jose, CA (US);

Nian Niles Yang, Mountain View, CA (US);

Xinde Hu, San Diego, CA (US);

Assignee:

SANDISK TECHNOLOGIES INC., Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 11/10 (2006.01); H03M 13/11 (2006.01); H03M 13/29 (2006.01); G11C 11/56 (2006.01); G11C 16/22 (2006.01); H03M 13/09 (2006.01); H03M 13/15 (2006.01);
U.S. Cl.
CPC ...
G06F 11/10 (2013.01); G06F 11/1072 (2013.01); G11C 11/5628 (2013.01); G11C 16/22 (2013.01); G11C 29/78 (2013.01); H03M 13/11 (2013.01); H03M 13/2906 (2013.01); H03M 13/2927 (2013.01); H03M 13/098 (2013.01); H03M 13/1102 (2013.01); H03M 13/152 (2013.01); H03M 13/1515 (2013.01); H03M 13/2957 (2013.01);
Abstract

A data storage device includes a non-volatile memory and a controller. A method includes receiving first data and second data from a host device. A first error-correcting code (ECC) codeword associated with the first data is written to a first word line of the non-volatile memory, and a second ECC codeword associated with the second data is written to a second word line of the non-volatile memory. The first ECC codeword includes a first bit and a second bit, and the second ECC codeword includes a third bit and a fourth bit. The method further includes writing parity information to a parity storage portion of the non-volatile memory that is distinct from the first word line and from the second word line. The parity information includes a parity bit that is based on the first bit, the second bit, the third bit, and the fourth bit.


Find Patent Forward Citations

Loading…