The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 2015

Filed:

May. 10, 2012
Applicants:

Bruce B. Doris, Brewster, NY (US);

Kangguo Cheng, Guilderland, NY (US);

Ali Khakifirooz, Slingerlands, NY (US);

Douglas C. LA Tulipe, Jr., Guilderland, NY (US);

Inventors:

Bruce B. Doris, Brewster, NY (US);

Kangguo Cheng, Guilderland, NY (US);

Ali Khakifirooz, Slingerlands, NY (US);

Douglas C. La Tulipe, Jr., Guilderland, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 21/74 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66477 (2013.01); H01L 21/743 (2013.01); H01L 29/66636 (2013.01); H01L 27/12 (2013.01); H01L 27/1203 (2013.01); H01L 29/66545 (2013.01); H01L 29/78 (2013.01); H01L 29/7848 (2013.01);
Abstract

A semiconductor structure including expanded source/drain regions that extend in an opposite direction of a gate electrode is provided. The semiconductor structure includes a stack of a body-containing region and a buried insulator portion, a gate dielectric in contact with a surface of the body-containing region, a gate electrode in contact with the gate dielectric, and a source region and a drain region laterally spaced by, and in contact with, the stack. The semiconductor structure further includes a contact level dielectric layer deposited on surfaces of the source region, the drain region and the buried insulator portion.


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