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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9208827 B1

PDFFull Text
Date of Patent:
Dec. 08, 2015

Filed:

Oct. 29, 2014

Semiconductor stacked package

Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Ki Yong Lee, Seoul, KR;

Jong Hyun Kim, Seoul, KR;

Sang Hwan Kim, Seoul, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:

William Park & Associates Ltd.

Primary Examiner:

David S Blum

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/02 (2006.01); G11C 5/02 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); G11C 7/14 (2006.01); H01L 23/525 (2006.01); G11C 7/10 (2006.01); G11C 5/14 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G11C 5/025 (2013.01); G11C 5/14 (2013.01); G11C 7/109 (2013.01); G11C 7/1063 (2013.01); G11C 7/14 (2013.01); G11C 29/1201 (2013.01); H01L 23/5256 (2013.01); H01L 24/09 (2013.01); H01L 24/49 (2013.01); H01L 25/0657 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/0901 (2013.01); H01L 2224/0903 (2013.01); H01L 2224/09179 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48148 (2013.01); H01L 2224/48227 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06596 (2013.01); H01L 2924/1207 (2013.01); H01L 2924/13091 (2013.01);
Abstract

A semiconductor stacked package may include a substrate formed with a plurality of coupling pads, a plurality of semiconductor chips stacked on the substrate. The semiconductor stacked package may also include first circuit units disposed on each of the semiconductor chips, and electrically connected with the coupling pads by the medium of bonding pads. The semiconductor stacked package may include second circuit units disposed on each of the semiconductor chips and electrically disconnected with the coupling pads, connection pads disposed on each of the semiconductor chips and corresponding to the second circuit units, and blocking circuits coupled between the second circuit units and the connection pads. The semiconductor stacked package may also include bonding wires electrically connecting the bonding pads and the coupling pads.

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