The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Nov. 04, 2014
Applicant:

Spansion Llc, Sunnyvale, CA (US);

Inventors:

Sally Foong, Milpitas, CA (US);

Seshasayee Gaddamraja, Santa Clara, CA (US);

Teoh Lai Beng, Penang, MY;

Lai Nguk Chin, Penang, MY;

Suthakavatin Aungkul, Patumtanee, TH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 25/00 (2006.01); H01L 23/544 (2006.01); H01L 25/065 (2006.01); H01L 21/77 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/77 (2013.01); H01L 23/544 (2013.01); H01L 24/85 (2013.01); H01L 25/0657 (2013.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 2223/5442 (2013.01); H01L 2223/54426 (2013.01); H01L 2223/54486 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48095 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/8513 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06593 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15311 (2013.01);
Abstract

Embodiments of the present invention include a method for multi-chip packaging. For example, the method includes positioning a first integrated circuit (IC) on a substrate package based on a first set of reference markers in physical contact with the substrate package and confirming an alignment of the first IC based on a second set of reference markers in physical contact with the substrate package. A second IC is stacked onto first IC based on the first set of reference markers. An alignment of the second IC is confirmed based on the second set of reference markers, where the second set of reference markers is disposed at a different location on the substrate package than the first set of reference markers.


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