The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Feb. 24, 2013
Applicant:

Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);

Inventors:

Yan Xun Xue, Los Gatos, CA (US);

Ping Huang, Shanghai, CN;

Hamza Yilmaz, Saratoga, CA (US);

Yueh-Se Ho, Sunnyvale, CA (US);

Lei Shi, Shanghai, CN;

Liang Zhao, Shanghai, CN;

Ping Li Wu, Shanghai, CN;

Lei Duan, Shanghai, CN;

Yuping Gong, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); H01L 21/561 (2013.01); H01L 23/3114 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/73 (2013.01); H01L 2224/1184 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/29 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/73104 (2013.01); H01L 2224/83191 (2013.01); H01L 2924/10156 (2013.01); H01L 2924/10157 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/18301 (2013.01);
Abstract

A method for preparing semiconductor devices in a flip chip process comprises forming deep grooves surrounding each of the semiconductor chips; depositing a first plastic package material to form a first plastic package layer covering front surface of the semiconductor wafer and filling the deep grooves; depositing a metal layer at back surface of the semiconductor wafer after grinding; grinding an outermost portion of the metal layer thus forming a ring area located at back surface around edge of the semiconductor wafer not covered by the metal layer; cutting the first plastic package layer, the semiconductor wafer, the metal layer and the first plastic package material filled in the deep grooves along a straight line formed by two ends of each of the deep grooves filled with the first plastic package material; and picking up the semiconductor devices and mounting on a substrate without flipping the semiconductor devices.


Find Patent Forward Citations

Loading…