The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2015

Filed:

Jun. 06, 2012
Applicants:

Wei Qiang Jin, Shanghai, CN;

Ding Hui Xu, Shanghai, CN;

Inventors:

Wei Qiang Jin, Shanghai, CN;

Ding Hui Xu, Shanghai, CN;

Assignee:

STATS ChipPAC Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 25/10 (2006.01); H01L 23/50 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 25/105 (2013.01); H01L 23/3121 (2013.01); H01L 23/49838 (2013.01); H01L 23/50 (2013.01); H01L 24/32 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48227 (2013.01);
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing an interposer having an interposer bottom side and an interposer top side; attaching a base integrated circuit to the interposer bottom side; attaching a lead to the interposer bottom side, the lead adjacent the base integrated circuit and entirely below the interposer; and forming an encapsulation partially covering the lead and exposing the interposer top side.


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