The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2015
Filed:
Apr. 29, 2014
Intermolecular Inc., San Jose, CA (US);
Kabushiki Kaisha Toshiba, Tokyo, JP;
Sandisk 3d Llc, Milpitas, CA (US);
Federico Nardi, Palo Alto, CA (US);
Ryan C. Clarke, San Jose, CA (US);
Tim Minvielle, San Jose, CA (US);
Yun Wang, San Jose, CA (US);
Intermolecular, Inc., San Jose, CA (US);
Kabushiki Kaisha Toshiba, Tokyo, JP;
SanDisk 3D LLC, Milpitas, CA (US);
Abstract
Provided are resistive random access memory (ReRAM) cells having extended conductive layers operable as electrodes of other devices, and methods of fabricating such cells and other devices. A conductive layer of a ReRAM cell extends beyond the cell boundary defined by the variable resistance layer. The extended portion may be used a source or drain region of a FET that may control an electrical current through the cell or other devices. The extended conductive layer may be also operable as electrode of another resistive-switching cell or a different device. The extended conductive layer may be formed from doped silicon. The variable resistance layer of the ReRAM cell may be positioned on the same level as a gate dielectric layer of the FET. The variable resistance layer and the gate dielectric layer may have the same thickness and share common materials, though they may be differently doped.