The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

Jul. 06, 2012
Applicants:

Byung Tai DO, Singapore, SG;

Heap Hoe Kuan, Singapore, SG;

Linda Pei EE Chua, Singapore, SG;

Inventors:

Byung Tai Do, Singapore, SG;

Heap Hoe Kuan, Singapore, SG;

Linda Pei Ee Chua, Singapore, SG;

Assignee:

STATS ChipPAC, Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/04 (2006.01); H01L 21/683 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 25/03 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6835 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 24/19 (2013.01); H01L 24/25 (2013.01); H01L 24/82 (2013.01); H01L 25/03 (2013.01); H01L 25/0657 (2013.01); H01L 24/12 (2013.01); H01L 24/48 (2013.01); H01L 2221/68336 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68372 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/18 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48472 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/82001 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06551 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01023 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/19107 (2013.01); H01L 2924/30105 (2013.01);
Abstract

A semiconductor wafer contains a plurality of die with contact pads disposed on a first surface of each die. Metal vias are formed in trenches in the saw street guides and are surrounded by organic material. Traces connect the contact pads and metal vias. The metal vias can be half-circle vias or full-circle vias. The metal vias are surrounded by organic material. Redistribution layers (RDL) are formed on a second surface of the die opposite the first surface. The RDL and through-hole vias (THV) provide expanded interconnect flexibility to adjacent die. Repassivation layers are formed between the RDL on the second surface of the die for electrical isolation. The die are stackable and can be placed in a semiconductor package with other die. The RDL provide electrical interconnect to the adjacent die. Bond wires and solder bumps also provide electrical connection to the semiconductor die.


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