The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2015
Filed:
Aug. 20, 2012
Sung-taeg Kang, Austin, TX (US);
Cheong M. Hong, Austin, TX (US);
Sung-Taeg Kang, Austin, TX (US);
Cheong M. Hong, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Split-gate non-volatile memory (NVM) cells having select-gate sidewall metal silicide regions are disclosed along with related manufacturing methods. Spacer etch processing steps are used to expose sidewall portions of select gates. Metal silicide regions are then formed within these sidewall portions of the select gates. Further, metal silicide regions can also be formed in top portions of the select gates. Further, the select gates can also be formed with one or more notches. By expanding the size of the metal silicide region to include the sidewall portion of the select gate, the select gate wordline (e.g., polysilicon) resistance is reduced for split-gate NVM arrays, the electrical contact to the select gate is improved, and performance of the select-gate NVN cell is improved.