The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Oct. 04, 2012
Applicant:

Shin-etsu Handotai Co., Ltd., Tokyo, JP;

Inventors:

Kazuaki Aoki, Nishigo-mura, JP;

Shigeru Oba, Nishigo-mura, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B24B 49/03 (2006.01); B24B 49/16 (2006.01); B24B 37/005 (2012.01); B24B 37/08 (2012.01); B24B 37/04 (2012.01); H01L 21/02 (2006.01); H01L 21/66 (2006.01); B24B 49/00 (2012.01);
U.S. Cl.
CPC ...
B24B 37/08 (2013.01); B24B 37/042 (2013.01); B24B 49/00 (2013.01); B24B 49/03 (2013.01); H01L 21/02024 (2013.01); H01L 22/12 (2013.01); H01L 22/20 (2013.01);
Abstract

The present invention is directed to a double-side polishing method including interposing a wafer held by a carrier between upper and lower turn tables to which respective polishing pads are attached, and rotating and revolving the carrier while supplying a polishing agent to polish both surfaces of the wafer at the same time, the method including the steps of: first polishing at a high polishing rate; second polishing at a low polishing rate; measuring flatness of the polished wafer; and determining polishing conditions of the second polishing in a next polishing batch on a basis of the measured flatness. The method can stably improve the flatness of a wafer without being affected by variations in carrier thickness over time.


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