The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2015

Filed:

Dec. 18, 2014
Applicant:

Tessera, Inc., San Jose, CA (US);

Inventors:

Belgacem Haba, Saratoga, CA (US);

Craig S. Mitchell, San Jose, CA (US);

Masud Beroz, Cary, NC (US);

Assignee:

Tessera, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/10 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 25/105 (2013.01); H01L 21/78 (2013.01); H01L 23/49833 (2013.01); H01L 24/97 (2013.01); H01L 24/48 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/97 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1029 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1052 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/01002 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01027 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/07811 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/19107 (2013.01); H01L 2924/3011 (2013.01);
Abstract

In-process units include upper and lower dielectric substrates and a plurality of microelectronic elements disposed between the upper and lower substrates. Each of the upper and lower substrates includes a plurality of regions. Each region of the upper substrate is aligned with a corresponding region of the lower substrate. At least one of the microelectronic elements is disposed between the upper and lower substrates and each of the regions of the upper and lower substrates has interlayer connection terminals at the surface thereof. Vertically elongated electrical conductors are formed from copper and each extend in a vertical direction away from the surface of a dielectric substrate of one of the upper and lower dielectric substrates and have an end joined with an electrically conductive bonding material to the interlayer connection terminal of the region of an other one of the upper and lower dielectric substrates.


Find Patent Forward Citations

Haba, Belgacem. (2015). Stacked packaging improvements (U.S. Patent No. 9153562). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9153562

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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