The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2015
Filed:
Dec. 22, 2011
Randy B. Osborne, Beaverton, OR (US);
Stanley S. Kulick, Portland, OR (US);
Erin Francom, Fort Collins, CO (US);
Thomas P. Thomas, Beaverton, OR (US);
Randy B. Osborne, Beaverton, OR (US);
Stanley S. Kulick, Portland, OR (US);
Erin Francom, Fort Collins, CO (US);
Thomas P. Thomas, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Mechanisms for clock gating. A clock generation circuit provides a clock signal over a clock signal distribution network within an integrated circuit package. Gating elements within the clock signal distribution network disable the clock signal to one or more portions of the clock signal distribution network. A digital locked loop (DLL) maintains settings without tracking when the clock signal is disabled.