The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2015
Filed:
Dec. 13, 2012
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Paul R. Besser, Sunnyvale, CA (US);
Mark V. Raymond, Schenectady, NY (US);
Valli Arunachalam, Pleasant Valley, NY (US);
Hoon Kim, Guilderland, NY (US);
Assignee:
GLOBALFOUNDRIES, INC., Grand Cayman, KY;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/283 (2006.01); H01L 29/49 (2006.01); H01L 21/285 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4916 (2013.01); H01L 21/28518 (2013.01); H01L 29/41791 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract
Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate and forming fins over the semiconductor substrate. Each fin is formed with sidewalls. The method further includes conformally depositing a metal film stack on the sidewalls of each fin. In the method, the metal film stack is annealed to form a metal silicide film over the sidewalls of each fin.