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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9123684 B1

PDFFull Text
Date of Patent:
Sep. 01, 2015

Filed:

Jun. 15, 2014

Chip package structure and manufacturing method thereof

Applicant:

Chipmos Technologies Inc., Hsinchu, TW;

Inventor:

Tsung-Jen Liao, Hsinchu, TW;

Assignee:

ChipMOS Technologies Inc., Hsinchu, TW;

Attorney:

Jianq Chyun IP Office

Primary Examiner:

Joseph Schoenholtz

Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 23/04 (2006.01); H01L 23/10 (2006.01); H01L 23/13 (2006.01); H01L 23/14 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/29 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 23/34 (2013.01); H01L 21/4882 (2013.01); H01L 23/13 (2013.01); H01L 23/142 (2013.01); H01L 23/293 (2013.01); H01L 23/3157 (2013.01); H01L 23/3677 (2013.01); H01L 23/495 (2013.01); H01L 24/82 (2013.01); H01L 24/83 (2013.01);
Abstract

A chip package structure including a leadframe, a chip, at least one heat dissipation pillar, and a molding compound is provided. The leadframe includes a die pad and a plurality of leads. The die pad has at least one through hole. The leads surround the die pad. The chip is located on the die pad and electronically connected to the leads. The chip includes an active surface and a back surface opposite to the active surface. The back surface of the chip is adhered to the die pad. The heat dissipation pillar is located on the back surface and passes through the through hole. The molding compound encapsulates the chip, at least parts of the leads, and the die pad. The molding compound includes at least one opening to expose the heat dissipation pillar. A manufacturing method of the chip package structure is also provided.

Find Patent Forward Citations

Liao, Tsung-Jen. (2015). Chip package structure and manufacturing method thereof (U.S. Patent No. 9123684). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9123684

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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