The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2015

Filed:

Mar. 20, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Emre Alptekin, Wappingers Falls, NY (US);

Sameer H. Jain, Beacon, NY (US);

Viraj Y. Sardesai, Poughkeepsie, NY (US);

Cung D. Tran, Newburgh, NY (US);

Reinaldo A. Vega, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/263 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/78 (2006.01); H01L 21/316 (2006.01); H01L 21/318 (2006.01); H01L 21/314 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/02266 (2013.01); H01L 21/02639 (2013.01); H01L 21/263 (2013.01); H01L 21/314 (2013.01); H01L 21/316 (2013.01); H01L 21/318 (2013.01); H01L 29/7851 (2013.01); H01L 29/66803 (2013.01);
Abstract

Angled directional ion beams are directed to sidewalls of a gate structure that straddles at least one semiconductor fin. The directions of the angled directional ion beams are contained within a vertical plane that is parallel to the sidewalls of the at least one semiconductor. A pair of gate spacers are formed on sidewalls of the gate structure by accumulation of the deposited dielectric material from the angled directional ion beams and without use of an anisotropic etch, while the sidewalls of the semiconductor fins parallel to the directional ion beams remain physically exposed. A selective epitaxy process can be performed to form raised active regions by growing a semiconductor material from the sidewalls of the semiconductor fins.


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