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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9105692 B1

PDFFull Text
Date of Patent:
Aug. 11, 2015

Filed:

Oct. 21, 2013

Method of fabricating an interconnection structure in a cmos comprising a step of forming a dummy electrode

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Han-Guan Chew, Singapore, SG;

Ming Zhu, Singapore, SG;

Lee-Wee Teo, Singapore, SG;

Harry-Hak-Lay Chuang, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., , TW;

Attorney:

Lowe Hauptman & Ham, LLP

Primary Examiner:

Ngan Ngo

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/768 (2006.01); H01L 21/28 (2006.01); H01L 21/8238 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/768 (2013.01); H01L 21/28088 (2013.01); H01L 21/823842 (2013.01); H01L 21/823871 (2013.01); H01L 29/4966 (2013.01); H01L 29/66545 (2013.01); H01L 29/66606 (2013.01); H01L 29/7833 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method for fabricating an interconnection structure in a complementary metal-oxide-semiconductor (CMOS) includes forming an opening in a dielectric layer over a substrate and forming a dummy electrode in a first portion of the opening in the dielectric layer. The method further includes filling a second portion of the opening with a second work-function metal layer, wherein a top surface of the second work-function metal layer is below a top surface of the opening and removing the dummy electrode. The method further includes depositing a first work-function metal layer in the first and second portions, whereby the first work-function metal layer is over the second work-function metal layer in the opening and depositing a signal metal layer over the first work-function metal layer in the first and second portions.

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