The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2015
Filed:
Aug. 30, 2012
Yoichi Minemura, Mie-ken, JP;
Takayuki Tsukamoto, Mie-ken, JP;
Takafumi Shimotori, Kanagawa-ken, JP;
Hiroshi Kanno, Mie-ken, JP;
Tomonori Kurosawa, Kanagawa-ken, JP;
Mizuki Kaneko, Kanagawa-ken, JP;
Yoichi Minemura, Mie-ken, JP;
Takayuki Tsukamoto, Mie-ken, JP;
Takafumi Shimotori, Kanagawa-ken, JP;
Hiroshi Kanno, Mie-ken, JP;
Tomonori Kurosawa, Kanagawa-ken, JP;
Mizuki Kaneko, Kanagawa-ken, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to one embodiment, a semiconductor memory device includes a plurality of cell array blocks and a control circuit. The control circuit sets a selected bit line to have 0 volt, applies a first electric potential which is higher than 0 volt to a selected word line, applies a second electric potential which is higher than 0 volt and lower than the first electric potential to non-selected word lines other than the selected word line, applies a third electric potential which is 0 volt or more and lower than the second electric potential to a non-selected bit line adjacent to the selected bit line in an adjacent cell array block, applies the second electric potential to non-selected bit lines other than the non-selected bit line to which the third electric potential is applied, and changes a resistance status of the resistance variable film of the selected memory cell.