The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2015

Filed:

May. 08, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Margaret R. Charlebois, Jericho, VT (US);

Christopher D. Hanudel, Essex Junction, VT (US);

Robert D. Herzl, South Burlington, VT (US);

David W. Milton, Underhill, VT (US);

Clarence R. Ogilvie, Huntington, VT (US);

Paul M. Schanely, Essex Junction, VT (US);

Tad J. Wilder, South Hero, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3185 (2006.01); G01R 31/3177 (2006.01); G01R 31/28 (2006.01); G06F 11/267 (2006.01); G01R 31/3187 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318541 (2013.01); G01R 31/2815 (2013.01); G01R 31/3177 (2013.01); G06F 11/267 (2013.01); G01R 31/3187 (2013.01); G01R 31/318533 (2013.01); G06F 11/1423 (2013.01);
Abstract

A performance screen ring oscillator (PSRO) is formed from multi-dimensional pairings of scan chains. In one embodiment, there is a multi-dimensional arrangement of scan chains in an integrated circuit. Each of the scan chains has interconnected scan chain elements that form a shift register to apply test patterns to inputs of combinational logic in the integrated circuit and read outputs from the combinational logic based on the inputted test patterns. A scan chain link links selected scan chain elements from the scan chains to form at least one PSRO loop within the multi-dimensional arrangement of the scan chains.


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