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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9093480 B1

PDFFull Text
Date of Patent:
Jul. 28, 2015

Filed:

Dec. 20, 2013

Spacer passivation for high aspect ratio etching of multilayer stacks for three dimensional nand device

Applicant:

Sandisk Technologies, Inc., Plano, TX (US);

Inventors:

Raghuveer S. Makala, Campbell, CA (US);

Yao-Sheng Lee, Tampa, FL (US);

Johann Alsmeier, San Jose, CA (US);

Henry Chien, San Jose, CA (US);

Masanori Terahara, Yokkaichi, JP;

Hirofumi Watatani, Yokkaichi, JP;

Assignee:

SANDISK TECHNOLOGIES INC., Plano, TX (US);

Attorney:

The Marbury Law Group PLLC

Primary Examiner:

Kevin M Picardat

Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 27/115 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66833 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 29/66825 (2013.01); H01L 29/7889 (2013.01); H01L 29/7926 (2013.01);
Abstract

A method of making a semiconductor device includes forming a stack of alternating layers of a first material and a second material over a substrate, etching the stack to form at least one opening extending partially through the stack and forming a masking layer on a sidewall and bottom surface of the at least one opening. The method also includes removing the masking layer from the bottom surface of the at least one opening while leaving the masking layer on the sidewall of the at least one opening, and further etching the at least one opening to extend the at least one opening further through the stack while the masking layer remains on the sidewall of the at least one opening.

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Quick Actions:

Makala, Raghuveer. (2015). Spacer passivation for high aspect ratio etching of multilayer stacks for three dimensional nand device (U.S. Patent No. 9093480). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9093480

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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