The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2015
Filed:
Aug. 13, 2013
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventors:
Chin-Chia Chang, Zhongli, TW;
Han-Wei Yang, Hsinchu, TW;
Chen-Chung Lai, Guanxi Township, TW;
Kang-Min Kuo, Zhubei, TW;
Bor-Zen Tien, Hsinchu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 27/146 (2006.01); H01L 29/78 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 21/265 (2013.01); H01L 21/76286 (2013.01); H01L 27/1463 (2013.01); H01L 29/6659 (2013.01); H01L 29/7833 (2013.01);
Abstract
An integrated circuit includes a p-type region formed beneath a surface of a semiconductor substrate, and an n-type region formed beneath the surface of the semiconductor substrate. The n-type region meets the p-type region at a p-n junction. A diffusion barrier structure, which is beneath the surface of the semiconductor substrate and extends along a side of the p-n junction, limits lateral diffusion between the p-type region and n-type region.