The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2015

Filed:

Nov. 17, 2011
Applicants:

Ronald G. Filippi, Wappingers Falls, NY (US);

Griselda Bonilla, Fishkill, NY (US);

Kaushik Chanda, Hopewell Junciton, NY (US);

Samuel S. Choi, Beacon, NY (US);

Stephan Grunow, Poughkeepsie, NY (US);

Naftali E. Lustig, Croton-on-Hudson, NY (US);

Andrew H. Simon, Fishkill, NY (US);

Inventors:

Ronald G. Filippi, Wappingers Falls, NY (US);

Griselda Bonilla, Fishkill, NY (US);

Kaushik Chanda, Hopewell Junciton, NY (US);

Samuel S. Choi, Beacon, NY (US);

Stephan Grunow, Poughkeepsie, NY (US);

Naftali E. Lustig, Croton-on-Hudson, NY (US);

Andrew H. Simon, Fishkill, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01H 85/04 (2006.01); G11C 17/16 (2006.01); H01L 23/525 (2006.01); H01L 23/522 (2006.01); G11C 29/00 (2006.01); H01H 85/46 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
G11C 17/16 (2013.01); G11C 29/702 (2013.01); H01L 23/5226 (2013.01); H01L 23/5256 (2013.01); H01L 23/5329 (2013.01); H01L 23/53295 (2013.01); H01H 2085/466 (2013.01); H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 23/53252 (2013.01);
Abstract

A metal fuse structure using redundant vias formed on one metal level in a stacked via metal fuse structure to force failures to occur in the metal level that does not have the redundant vias. The metal fuse structure includes a first dielectric layer having a conductor, a second dielectric layer above the first dielectric layer having a first conductive line and a first via, the first via is on the conductor, the first conductive line is on the first via, the first via is the only electrical connection between the first conductive line and the conductor, and a third dielectric layer above the second dielectric layer having a second conductive line, a second via and a third via, the second via and the third via are both on the first conductive line, the second conductive line is on both the first via and the second via.


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