The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2015
Filed:
Apr. 16, 2014
Jeong-heon Park, Hwaseong-si, KR;
Ki-woong Kim, Yongin-si, KR;
Hee-ju Shin, Yongin-si, KR;
Joon-myoung Lee, Suwon-si, KR;
Woo-jin Kim, Yongin-si, KR;
Jae-hoon Kim, Seoul, KR;
Se-chung OH, Yongin-si, KR;
Yun-jae Lee, Seoul, KR;
Jeong-Heon Park, Hwaseong-si, KR;
Ki-Woong Kim, Yongin-si, KR;
Hee-Ju Shin, Yongin-si, KR;
Joon-Myoung Lee, Suwon-si, KR;
Woo-Jin Kim, Yongin-si, KR;
Jae-Hoon Kim, Seoul, KR;
Se-Chung Oh, Yongin-si, KR;
Yun-Jae Lee, Seoul, KR;
Abstract
A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.