The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9087870 B1

Expired

Date of Patent:

Jul. 21, 2015

Filed:

May. 29, 2013

Integrated circuits including finfet devices with shallow trench isolation that includes a thermal oxide layer and methods for making the same

Applicant:

Globalfoundries, Inc., Grand Cayman, KY;

Inventors:

Wei Hua Tong, Mechanicville, NY (US);

Huang Liu, Mechanicville, NY (US);

HongLiang Shen, Clifton Park, NY (US);

Jin Ping Liu, Hopewell Junction, NY (US);

Seung Kim, Grand Cayman, KY;

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorney:

Ingrassia Fisher & Lorenz, P.C.

Primary Examiner:

Minh-Loan Tran

Assistant Examiner:

Fazli Erdem

Int. Cl.

CPC ...

H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 21/3115 (2006.01); H01L 29/78 (2006.01);

U.S. Cl.

CPC ...

H01L 21/76224 (2013.01); H01L 21/31155 (2013.01); H01L 29/785 (2013.01);

Abstract

Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes etching an enhanced high-aspect-ratio process (eHARP) oxide fill that is disposed in an STI trench between two adjacent fins to form a recessed eHARP oxide fill. The two adjacent fins extend from a bulk semiconductor substrate. A silicon layer is formed overlying the recessed eHARP oxide fill. The silicon layer is converted to a thermal oxide layer to further fill the STI trench with oxide material.

Find Patent Forward Citations

Tong, Wei. (2015). Integrated circuits including finfet devices with shallow trench isolation that includes a thermal oxide layer and methods for making the same (U.S. Patent No. 9087870). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9087870

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