The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2015
Filed:
Nov. 17, 2009
Applicants:
Amlan Sen, Singapore, SG;
Chin Guan Khaw, Singapore, SG;
Inventors:
Amlan Sen, Singapore, SG;
Chin Guan Khaw, Singapore, SG;
Assignee:
Advanpack Solutions Pte Ltd, Singapore, SG;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/56 (2013.01); H01L 23/3121 (2013.01); H01L 24/97 (2013.01); H01L 21/561 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/97 (2013.01);
Abstract
The present invention describes two systems () for encapsulation of semiconductor dies. Both systems () involve attaching an encapsulation spacer () having one or more apertures () on an associated substrate () so that a group of chips is located within the aperture (). The first system () involves dispensing encapsulant () directly into an aperture. The second system () involves attaching an encapsulant delivery layer () onto the encapsulation spacer and discharging encapsulant into an aperture via a recessed gate ().