The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Dec. 30, 2008
Applicants:

Glenn J. Hinton, Portland, OR (US);

Steven E. Raasch, Shrewsbury, MA (US);

Sebastien Hily, Hillsboro, OR (US);

John G. Holm, Beaverton, OR (US);

Ronak Singhal, Portland, OR (US);

Avinash Sodani, Portland, OR (US);

Deborah T. Marr, Portland, OR (US);

Shubhendu S. Mukherjee, Southborough, MA (US);

Arijit Biswas, Holden, MA (US);

Adrian C. Moga, Portland, OR (US);

Inventors:

Glenn J. Hinton, Portland, OR (US);

Steven E. Raasch, Shrewsbury, MA (US);

Sebastien Hily, Hillsboro, OR (US);

John G. Holm, Beaverton, OR (US);

Ronak Singhal, Portland, OR (US);

Avinash Sodani, Portland, OR (US);

Deborah T. Marr, Portland, OR (US);

Shubhendu S. Mukherjee, Southborough, MA (US);

Arijit Biswas, Holden, MA (US);

Adrian C. Moga, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0842 (2013.01); G06F 12/0817 (2013.01);
Abstract

In one embodiment, the present invention includes a method for providing a cache block in an exclusive state to a first cache and providing the same cache block in the exclusive state to a second cache when cores accessing the two caches are executing redundant threads. Other embodiments are described and claimed.


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