The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Jul. 09, 2014
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Hsiung Lee, Hsinchu, TW;

Chien-Ying Lee, Hsinchu, TW;

Tzung-Ting Han, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76877 (2013.01); H01L 21/7688 (2013.01);
Abstract

Provided is a method for fabricating a memory device. A stack layer, including a storage layer, a first conductive layer and a first mask layer, is formed on the substrate in a first region and a second region. The stack layer is patterned to form a plurality of first patterned stack layers extending along a first direction and from the first region to the second region. Two sides of each first patterned stack layers have openings respectively. A filling layer is formed on the substrate, and filled in the openings. A second mask layer is formed on the second region, and does not cover the filling layer in the second region. Then, using the second mask layer and the filling layer as mask, the first patterned stack layers and part of the substrate are removed, and a plurality of trenches are formed in the substrate in the second region.


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Lee, Chih-Hsiung. (2015). Method for fabricating memory device (U.S. Patent No. 9070753). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9070753

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