The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Nov. 09, 2012
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Dwight L. Daniels, Phoenix, AZ (US);

Alan J. Magnus, Gilbert, AZ (US);

Pamela A. O'Brien, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4821 (2013.01); H01L 23/49582 (2013.01); H01L 24/97 (2013.01);
Abstract

Methods of manufacturing a flat-pack no-lead microelectronic package () coat exposed base metal at a cut end of a lead frame of the package with solder (). One method coats the exposed base metal with solder when the package is in a strip (). Another method coats the exposed base metal with solder after the package is singulated. As a result, all portions of leads of the package that may receive solder during mounting of the package to a printed circuit board are solder wettable. A solder wettable lead end () on the package facilitates formation of a solder fillet during mounting of the package.


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