The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2015
Filed:
Aug. 30, 2012
Applicants:
Xiaojun Yu, Beacon, NY (US);
Jin-man Han, San Jose, CA (US);
Aaron Yip, Santa Clara, CA (US);
Inventors:
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 16/14 (2006.01); G11C 16/10 (2006.01); G11C 16/32 (2006.01); G11C 16/08 (2006.01); G11C 16/06 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 16/14 (2013.01); G11C 16/0483 (2013.01);
Abstract
Apparatus, systems, and methods may operate to receive an external erase command at a control circuit coupled to an erasable memory array located on a substrate. A global select gate voltage may thereafter be enabled for application to wordline transistors coupled to the erasable memory array after a voltage applied to the substrate has reached a preselected initiation voltage level between about zero volts and an ultimate erase voltage.