The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2015
Filed:
Feb. 15, 2013
Win Semiconductors Corp., Tao Yuan Shien, TW;
Shinichiro Takatani, Tao Yuan Shien, TW;
Jung-Tao Chung, Tao Yuan Shien, TW;
Chih-Wei Wang, Tao Yuan Shien, TW;
Cheng-Guan Yuan, Tao Yuan Shien, TW;
Shih-Ming Joseph Liu, Tao Yuan Shien, TW;
WIN SEMICONDUCTORS CORP., Tao Yuan Shien, TW;
Abstract
An integrated circuit with ESD protection comprises at least one ESD protection circuit block, which comprises a DC blocking capacitor connected in parallel with at least one compound semiconductor enhancement mode FET as an ESD protection device. The ESD protection circuit block that is built in an integrated circuit provides ESD protection while minimizing the generation of unwanted nonlinear signals resulting from the ESD protection. An integrated circuit comprises a high frequency circuit, a switching element, and two ESD protection circuit blocks, in which the high frequency circuit is connected between a first terminal and a second terminal for inputting or outputting the RF signals, the first ESD protection circuit block is connected from a branch node between the first terminal and the high frequency circuit to the switching element, and the second ESD protection circuit block is connected from the switching element to the ground.