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Abstract

A semiconductor device having reduced leakage current and increased capacitance without increasing an equivalent oxide thickness (EOT) can be manufactured by a method that includes providing a substrate having a dummy gate pattern; forming a gate forming trench by removing the dummy gate pattern; forming a stacked insulation layer within the gate forming trench, wherein the forming of the stacked insulation layer includes forming a first high-k dielectric layer, forming a second high-k dielectric layer by performing heat treatment on the first high-k dielectric layer, and, after the heat treatment, forming a third high-k dielectric layer on the second high-k dielectric layer, the third high-k dielectric layer having a higher relative permittivity than the second high-k dielectric layer and having a dielectric constant of 40 or higher; and forming a gate electrode within the gate forming trench.