The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2015

Filed:

Oct. 08, 2013
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Qunhua Wang, Santa Clara, CA (US);

Lai Zhao, Campbell, CA (US);

Soo Young Choi, Fremont, CA (US);

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 21/02675 (2013.01); H01L 21/02488 (2013.01);
Abstract

The embodiments described herein generally relate to methods for forming a multi-layer amorphous silicon structure that may be used in thin film transistor devices. In one embodiment, a method includes positioning a substrate comprising a buffer layer in a process chamber, the process chamber comprising a processing region, forming a plurality of amorphous silicon layers and annealing the amorphous silicon layers to form a polycrystalline silicon layer. Forming the plurality of layers includes delivering a silicon-containing precursor and a first activation gas to the processing region to deposit a first amorphous silicon layer over the buffer layer, the silicon-containing precursor and the first activation gas being activated by a plasma and maintaining a continuous flow of the silicon-containing precursor while delivering a second activation gas, without the first activation gas, to the processing region to deposit a second silicon layer on the first silicon layer.


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