The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2015

Filed:

Dec. 13, 2012
Applicants:

Intermolecular Inc., San Jose, CA (US);

Kabushiki Kaisha Toshiba, Tokyo, JP;

Sandisk 3d Llc, Milpitas, CA (US);

Inventors:

Randall J. Higuchi, San Jose, CA (US);

Chien-Lan Hsueh, Campbell, CA (US);

Yun Wang, San Jose, CA (US);

Assignees:

Intermolecular, Inc., San Jose, CA (US);

Kabushiki Kaisha Toshiba, Tokyo, JP;

SanDisk 3D LLC, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1608 (2013.01); H01L 45/08 (2013.01); H01L 45/10 (2013.01); H01L 45/1233 (2013.01); H01L 45/145 (2013.01); H01L 45/146 (2013.01); H01L 45/1616 (2013.01); H01L 27/2409 (2013.01); H01L 27/2463 (2013.01);
Abstract

A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and lifetime by custom tailoring the average concentration of defects in the resistive switching film and methods of forming the same. The nonvolatile memory element includes a first electrode layer, a second electrode layer, and a resistive switching layer disposed between the first electrode layer and the second electrode layer. The resistive switching layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer has more defects than the first sub-layer. A method includes forming a first sub-layer on the first electrode layer by a first ALD process and forming a second sub-layer on the first sub-layer by a second ALD process, where the first sub-layer has a different amount of defects than the second sub-layer.


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