The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2015

Filed:

Dec. 08, 2011
Applicants:

Sho Akai, Ibi-gun, JP;

Tatsuya Imai, Ibi-gun, JP;

Iku Tokihisa, Ibi-gun, JP;

Inventors:

Sho Akai, Ibi-gun, JP;

Tatsuya Imai, Ibi-gun, JP;

Iku Tokihisa, Ibi-gun, JP;

Assignee:

IBIDEN CO., LTD., Ogaki-shi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/46 (2006.01); H05K 3/38 (2006.01); H05K 3/24 (2006.01); H05K 3/42 (2006.01);
U.S. Cl.
CPC ...
H05K 3/389 (2013.01); H05K 3/244 (2013.01); H05K 3/384 (2013.01); H05K 3/421 (2013.01); H05K 3/4644 (2013.01); H05K 2203/0361 (2013.01); H05K 2203/073 (2013.01); H05K 2203/0789 (2013.01);
Abstract

A multilayer printed wiring board including a first interlayer resin insulation layer, a first conductive circuit formed on the first interlayer resin insulation layer, a second interlayer resin insulation layer formed on the first interlayer resin insulation layer and the first conductive circuit and having an opening portion exposing a portion of the first conductive circuit, a second conductive circuit formed on the second interlayer resin insulation layer, a via conductor formed in the opening portion of the second interlayer resin insulation layer and connecting the first conductive circuit and the second conductive circuit, and a coating layer having a metal layer and a coating film and formed between the first conductive circuit and the second interlayer resin insulation layer. The metal layer is formed on the surface of the first conductive circuit and the coating film is formed on the metal layer.


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