The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Oct. 26, 2011
Applicants:

Randy W. Mann, Milton, NY (US);

Scott D. Luning, Poughkeepsie, NY (US);

Inventors:

Randy W. Mann, Milton, NY (US);

Scott D. Luning, Poughkeepsie, NY (US);

Assignee:

Global Foundries, Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); G11C 11/00 (2006.01); H01L 27/02 (2006.01); G11C 11/412 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); G11C 11/412 (2013.01); H01L 27/1104 (2013.01); Y10S 257/903 (2013.01);
Abstract

A static random access memory cell is provided that includes first and second inverters formed on a substrate each having a pull-up and pull-down transistor configured to form a cell node. Each of the pull-down transistors of the first and second inverters resides over first regions below the buried oxide layer and having a first doping level and applied bias providing a first voltage threshold for the pull-down transistors. A pair of passgate transistors is coupled the cell nodes of the first and second inverters, and each is formed over second regions below the buried oxide layer and having a second doping level and applied bias providing a second voltage threshold for the passgate transistors. The first voltage threshold differs from the second voltage threshold providing electrical voltage threshold control between the pull-down transistors and the passgate transistors.


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