The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Apr. 19, 2013
Applicant:

Shin-etsu Handotai Co., Ltd., Tokyo, JP;

Inventors:

Hiroji Aga, Takasaki, JP;

Toru Ishizuka, Takasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01); H01L 21/46 (2006.01); H01L 21/762 (2006.01); H01L 21/306 (2006.01); H01L 21/265 (2006.01); H01L 21/322 (2006.01); H01L 21/20 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76254 (2013.01); H01L 21/30604 (2013.01); H01L 21/265 (2013.01); H01L 21/76256 (2013.01); H01L 21/3226 (2013.01); H01L 21/76251 (2013.01); H01L 21/2007 (2013.01);
Abstract

The present invention provides a method for manufacturing an SOI wafer, in which an insulator film is formed at least on all surfaces of a base wafer, and while protecting a first part of the insulator film on a back surface on the opposite side from a bonded surface of the base wafer, a bonded wafer before separating a bond wafer along a layer of the implanted ion is brought into contact with a liquid capable of dissolving the insulator film or exposed to a gas capable of dissolving the insulator film, and a second part of the insulator film interposed between the bond wafer and the base wafer is etched from an outer circumferential edge of the bonded wafer and toward the center of the bonded wafer. The method can control the terrace width and inhibit warping of the SOI wafer in a bonding process with a base wafer.


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