The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2015
Filed:
Jun. 18, 2012
Shouhong Tang, Santa Clara, CA (US);
Shouhong Tang, Santa Clara, CA (US);
KLA—Tencor Corporation, Milpitas, CA (US);
Abstract
The invention provides a new dual-sided Moiré wafer analysis system that integrates wafer flatness measurement capability with wafer surface defect detection capability. The invention may be, but is not necessarily, embodied in methods and systems for simultaneously applying phase shifting reflective Moiré wafer analysis to the front and back sides of a silicon wafer and comparing or combining the front and back side height maps. This allows wafer surface height for each side of the wafer, thickness variation map, surface nanotopography, shape, flatness, and edge map to be determined with a dual-sided fringe acquisition process. The invention also improves the dynamic range of wafer analysis to measure wafers with large bows and extends the measurement area closer to the wafer edge.