The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Aug. 29, 2013
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Hung-Lin Shih, Hsinchu, TW;

Chun-Yuan Wu, Yunlin County, TW;

Chin-Fu Lin, Tainan, TW;

Chih-Chien Liu, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/28 (2006.01); H01L 21/306 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28141 (2013.01); H01L 21/30621 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01);
Abstract

Provided is a method of fabricating a semiconductor device including the following steps. A dummy gate structure is formed on a substrate, wherein the dummy gate structure includes a dummy gate and a stacked hard mask, and the stacked hard mask includes from bottom to top a first hard mask layer and a second hard mask layer. A spacer is formed on a sidewall of the dummy gate structure. A mask layer is formed on the substrate. An opening corresponding to the second hard mask layer is formed in the mask layer. The second hard mask layer is removed. The mask layer is removed. A dry etch process is performed to remove the first hard mask layer, wherein the dry etch process uses NFand Has etchants.


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