The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Jan. 28, 2013
Applicants:

Stmicroelectronics S.a., Montrouge, FR;

Commissariat À L'énergie Atomique ET Aux Énergies Alternatives, Paris, FR;

Inventors:

Benoit Sklenard, Grenoble, FR;

Perrine Batude, Grenoble, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/46 (2006.01); H01L 23/58 (2006.01); H01L 21/02 (2006.01); H01L 27/06 (2006.01); H01L 27/12 (2006.01); H01L 21/822 (2006.01);
U.S. Cl.
CPC ...
H01L 23/585 (2013.01); H01L 21/02038 (2013.01); H01L 27/0688 (2013.01); H01L 27/1203 (2013.01); H01L 21/8221 (2013.01);
Abstract

A method for manufacturing an integrated circuit, including the steps of forming first transistors on a first semiconductor layer; depositing a first insulating layer above the first semiconductor layer and the first transistors, and leveling the first insulating layer; depositing a conductive layer above the first insulating layer, and covering the conductive layer with a second insulating layer; bonding a semiconductor wafer to the second insulating layer; thinning the semiconductor wafer to obtain a second semiconductor layer; and forming second transistors on the second semiconductor layer.


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