The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2015

Filed:

Aug. 22, 2012
Applicants:

Shishir Kumar, Uttar Pradesh, IN;

Dibya Dipti, Uttar Pradesh, IN;

Pierre Malinge, Beacon, NY (US);

Inventors:

Shishir Kumar, Uttar Pradesh, IN;

Dibya Dipti, Uttar Pradesh, IN;

Pierre Malinge, Beacon, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); H01L 27/11 (2013.01); Y10S 257/903 (2013.01);
Abstract

A dual port SRAM has two data storage nodes, a true data and complementary data. A first pull down transistor has an active area that forms the drain region of the first transistor and the true data storage node that is physically isolated from all other transistor active areas of the memory cell. A second pull down transistor has an active area that forms the drain region of a second transistor that is the complementary data node that is physically isolated from all other transistor active areas of the memory cell.


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