The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2015
Filed:
Jan. 26, 2009
Applicants:
Kai Frohberg, Niederau, DE;
Volker Grimm, Langebrueck, DE;
Heike Salz, Radebeul, DE;
Heike Berthold, Hirschfeld, DE;
Inventors:
Kai Frohberg, Niederau, DE;
Volker Grimm, Langebrueck, DE;
Heike Salz, Radebeul, DE;
Heike Berthold, Hirschfeld, DE;
Assignee:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/8238 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823864 (2013.01); H01L 29/665 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/7843 (2013.01);
Abstract
By integrating a spacer removal process into the sequence for patterning a first stress-inducing material during a dual stress liner approach, the sidewall spacer structure for one type of transistor may be maintained, without requiring additional lithography steps.