The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Oct. 14, 2013
Applicant:

Aplus Flash Technology, Inc, San Jose, CA (US);

Inventors:

Peter Wung Lee, Saratoga, CA (US);

Hsing-Ya Tsao, San Jose, CA (US);

Assignee:

Aplus Flash Technology, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/30 (2006.01); G11C 5/14 (2006.01); G11C 14/00 (2006.01); G11C 16/12 (2006.01); G11C 16/22 (2006.01);
U.S. Cl.
CPC ...
G11C 16/30 (2013.01); G11C 5/141 (2013.01); G11C 14/0063 (2013.01); G11C 16/12 (2013.01); G11C 16/22 (2013.01);
Abstract

Two on-chip capacitors including one HV capacitor VPPcap and one LV VCC capacitor VCCcap are built over a NVSRAM memory chip as a back-up second power supplies for each NVSRAM cell, regardless of 1-poly, 2-poly, PMOS or NMOS flash cell structures therein. The on-chip HV and LV capacitors are preferably made from one or more MIM or MIP layers for achieving required capacitance. A simplified VCC power system circuit without a need of a State machine designed for performing only one NVSRAM Program operation without Erase operations is proposed for initiating NVSRAM's Auto-Store operation without using any off-chip Vbat and Vcap. During the Auto-Store operation, all HV pumps and oscillators associated with the two on-chip capacitors are shut off once VCC voltage drop is detected by a VCC detector to be below 80% of regular VDD level.


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