The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Jun. 03, 2014
Applicants:

Stmicroelectronics SA, Montrouge, FR;

Stmicroelectronics International N.v., Amsterdam, NL;

Inventors:

Stéphane Le Tual, Saint Egreve, FR;

Pratap Narayan Singh, Chahania Chandauli, IN;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); H03M 1/08 (2006.01); H03K 3/013 (2006.01); G11C 27/02 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03M 1/08 (2013.01); H03K 3/013 (2013.01); G11C 27/026 (2013.01); H03K 19/018528 (2013.01);
Abstract

The invention concerns a circuit comprising: a first transistor () having a first main current node coupled to a first voltage signal (CN), a control node coupled to a second voltage signal (CP) and a second main current node coupled to an output node () of the circuit; a second transistor () having a first main current node coupled to a third voltage signal (CN), a control node coupled to a fourth voltage signal (CP) and a second main current node coupled to said output node of the circuit; and circuitry () adapted to generate said first, second, third and fourth voltage signals based on a pair of differential input signals (CP, CN), wherein said first and second voltage signals are both referenced to a first supply voltage (VDD) and wherein said third and fourth voltage signals are both referenced to a second supply voltage (GND).


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